Apple II slot specification users reports and reviews |
Date | Content Revision |
User opinion | Comment | Approved by moderator? |
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INCORRECT | Data bus signals D[0..7] are reversed | APPROVED | ||
2010-01-21 01:49:26 | rev. 2 | ERROR FIXED | Pin 42 is D7; 43 is D6; 42 is D5; 43 is D4; 44 is D3; 45 is D2; 46 is D1; 47 is D0; you have them reversed in the pinout. | APPROVED |
2010-08-17 04:24:48 | rev. 2 | ERROR FIXED | Data bus is flipped: The correct order has pin 42 = D7, 43 = D6, all the way down to 49 = D0. Confirmed in actual practice on a //e, as well as with the Apple II Reference Manual "red book" (Jan 1978) page 149, and the Apple IIgs Hardware Reference 2nd Ed (page 173). | APPROVED |
Date | Content Revision |
Author | Comment |
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Pinouts.ru > Pinout of Apple II slot and layout of connector |
may be incorrect |