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PCIE (PCI Express) 1x, 4x, 8x, 16x bus specification users reports and reviews |
| Date | Content Revision |
User opinion | Comment | Approved by moderator? |
|---|---|---|---|---|
| CORRECT | APPROVED | |||
| CORRECT | APPROVED | |||
| CORRECT | where is the chart? | APPROVED | ||
| 2009-04-26 00:12:34 | rev. 2 | CORRECT | APPROVED | |
| 2010-08-20 15:57:36 | rev. 3 | CORRECT | APPROVED | |
| 2010-10-07 22:20:22 | rev. 3 | ERROR FIXED | PRSNT#1 is connected to GND on motherboard. Add on card need to have PRSNT#1 connected to one of PRSNT#2 depending what type of connector is in use. Explanation for PRSNT#1 is incorrect. Edin | APPROVED |
| 2011-10-22 22:27:54 | rev. 4 | CORRECT | APPROVED | |
| 2012-01-03 01:39:43 | rev. 4 | INCORRECT | B3 for the PCIe connector definition should be +12V. It is reserved as shown for the x4 and x8 lengths. As a design note, x4 boards and x8 boards are frequently used in x16 slots so adding the "extra +12V" connection can be a good thing. | APPROVED |
| 2012-11-19 12:24:47 | rev. 4 | CORRECT | APPROVED | |
| 2013-03-07 02:48:07 | rev. 4 | CORRECT | APPROVED | |
| 2016-07-05 00:34:55 | rev. 6 | CORRECT | APPROVED | |
| 2016-10-31 22:42:00 | rev. 6 | CORRECT | APPROVED | |
| 2016-11-10 22:52:01 | rev. 6 | CORRECT | APPROVED | |
| 2017-03-01 16:50:02 | rev. 6 | CORRECT | APPROVED | |
| 2017-03-02 08:00:38 | rev. 6 | CORRECT | APPROVED | |
| 2018-01-12 03:43:52 | rev. 7 | CORRECT | APPROVED | |
| 2018-06-23 00:57:05 | rev. 15 | CORRECT | APPROVED | |
| 2018-07-15 20:53:50 | rev. 15 | CORRECT | APPROVED | |
| 2018-11-08 05:59:26 | rev. 15 | INCORRECT | PWRGD - absents PERST# Fundamental Reset | APPROVED |
| 2020-04-22 18:28:55 | rev. 16 | CORRECT | APPROVED | |
| 2020-05-15 16:57:43 | rev. 16 | ERROR FIXED | Pin A11 should be PERST# (PCI-Express Reset signal). It is never used as a Power Good signal. | APPROVED |
| 2020-07-16 21:46:45 | rev. 16 | CORRECT | APPROVED | |
| 2020-10-28 13:57:26 | rev. 17 | CORRECT | APPROVED | |
| 2022-06-11 15:56:06 | rev. 17 | CORRECT | APPROVED | |
| 2023-01-24 08:31:51 | rev. 17 | CORRECT | APPROVED | |
| 2023-01-29 02:34:46 | rev. 17 | CORRECT | APPROVED | |
| 2023-08-27 13:04:48 | rev. 17 | CORRECT | APPROVED | |
| 2024-02-23 16:01:44 | rev. 17 | CORRECT | No. | APPROVED |
| Date | Content Revision |
Author | Comment |
|---|---|---|---|
| 2009-06-20 11:39:01 | rev. 3 | ||
| 2011-01-21 21:54:46 | rev. 4 | David Baker | pin 28 on 4x and 8x pinouts should read HSOn(3) vicd HSOn(0) also corrected "need" to "needs" in last sentence. |
| 2011-01-21 21:55:04 | rev. 4 | David Baker | pcie 4x pinout pin 28 should read HSOn(3) vice HSOn(0) |
| 2015-04-15 16:05:19 | rev. 6 | Jeffrey Weber | Pin 3 on the connector is not Reserved, it is used for +12V power |
| 2020-03-29 18:08:56 | rev. 16 | GS | Added PERST# to PWRGD (seen on mini-pcie) |
Pinouts.ru > Pinout of PCI Express 1x, 4x, 8x, 16x bus and layout of connector |
should be correct |